Currently available Memory systems are typically interfaced with a microprocessor core, which microprocessor core is operable to access any and all locations in the memory by generating an appropriate address. The processor requires access to the memory in order to both execute instructions and also read data from an address location or write data thereto.
In some situations, certain instructions are proprietary in nature and it is the desire of a manufacturer to protect that code. It is not the execution of the code that is to be protected but, rather, the ability of a user to gain access to the code, i.e., download the code, for reverse engineering thereof to determine the functionality that is embedded within the code. In systems that have provided this protected memory to prevent access to data or programs stored in the memory, circuitry is provided for monitoring the contents of the Program Counter and generating an inhibit signal whenever the Program Counter is at a certain value. This inhibit signal inhibits access to certain portions of the memory.
Additionally, protection of the memory is also important to the “lock” the memory from external access. This has typically been facilitated by generating lock bits in predetermined locations. Once these lock bits are set, the hardware will check a lock bit prior to allowing access to a particular section of memory. If a lock bit for that memory is set, then access to the memory for a read or write, depending upon which function is locked, will be prohibited. In order to reset the lock bit, the entire memory has to be erased.